Thursday, May 5 2005 19:47 Hrs (IST) - World Time -

Bangalore: Cadence Design Systems today (May 5, 2005) launched Incisive Formal Verifier, an analysis tool for electronic-design technologies that can be installed on desktops.

The formal verifier, combined with Cadence simulation, acceleration and emulation technologies, enables designers to improve the productivity and quality of functional verification earlier in the design and verification process.

"Customers can reduce production schedules significantly because design engineers can begin verification, as they are designing the chip," a Cadence statement said in Bangalore.